ARM has announced a new IP suite that will boost the mobile experience for users. The three major components included in the IP suite are ARM Cortex-A72 processor, ARM Mali-T880 GPU and ARM CoreLink CCI-500 Cache Coherent Interconnect. These new components will feature in mobile devices coming out in 2016.
“Our new premium mobile experience IP suite with the Cortex-A72 processor delivers a decisive step forward from the compelling user experiences provided by this year’s Cortex-A57 based devices,” said Pete Hutton, executive vice president of ARM.
The new Cortex-A72 CPU will be 50 times more powerful that the one from 5 years ago. It is based on ARMv8-A architecture with 64-bit processing but will provide full compatibility with current 32-bit software. It is a successor to Cortex-A57. Its performance is 3.5 times faster than devices based on Cortex-A15 but with reduced overall power consumption.
The Cortex-A72 will consume 75% less energy compared to 2014 devices for matching performance. To ease the chip implementation, ARM has also included POP IP for latest TSMC 16nm FinFET+ process. Cortex-A72 when combined with Cortex-A53 processor in ARM big.LITTLE configurations, will offer better performance and efficiency.
The new Mali-T880 GPU will offer 1.8 times the graphic performance delivered by the current devices using Mali-T760. There is also 40% less power consumption. The Mali-T880 GPU will offer stunning visuals and advanced console-like gaming experience. It will also give good fidelity for high-quality 4K content.
CoreLink CCI-500 Interconnect
The CoreLink CCI-500 Interconnect will allow higher system bandwidth and improved system efficiency. Its integrated snoop filter delivers power savings through big.LITTLE processing. CoreLink CCI-500 will offer double peak memory system bandwidth compared to its predecessor CoreLink CCI-400 and also 30% more processor memory performance.
ARM has already partnered with several companies including MediaTek, Cadence, HiSilicon, Synopsys and Rockchip for its new components.